<% $package %> - Z80 assembly / disassembly tables
use <% $package %>; Asm::Z80::Table->asm_table->{'adc'}{'a'}{','}{'('}{'hl'}{')'}{''} is [0x8E] Asm::Z80::Table->disasm_table->{0x8E}{''} is ['adc', 'a', ',', '(', 'hl', ')'] my $iter = Asm::Z80::Table->iterator; my($tokens, $bytes) = $iter->();
This module provides hash tables to assemble / disassemble all Z80 CPU assembly instructions, including undocumented ones (e.g. 'ld ixh,N') and instructions composed by sequences (e.g. 'ld bc,hl').
This module is used in a Z80 assembler / disassembler.
It was spun off the CPU::Z80::Assembler module.
Nothing.
This function returns the assembly hash table.
Starting at the root and following one sub-hash table for each token, with an empty token at the end of the list, produces an array of opcode bytes of the corresponding Z80 assembly.
Starting at the root key and following one sub-hash table for each opcode byte, with an empty byte at the end of the list, produces an array of tokens of the corresponding disassembled Z80 instruction.
Returns an iterator function that returns the next pair of token list and bytes list, while traversing all the asm_table. The iterator funtion returns an empty list () at the end.
asm_table
()
The following special tokens are used in both the tokens and bytes lists:
One byte;
One word;
The low byte of the word;
The high byte of the word;
The offset byte of a JR/DJNZ instruction that is converted to NN by adding address + 1;
The offset of a (ix+DIS) expression;
The offset of a (ix+DIS) expression for 16-bit load, e.g. ld (ix+DIS),bc;
ld (ix+DIS),bc
The offset of a (ix-NDIS) expression.
The offset of a (ix-NDIS) expression for 16-bit load, e.g. ld (ix-NDIS),bc;
ld (ix-NDIS),bc
The following extensions were implemented in this assembly/disassembly table:
ixh and ixl can be used as the high- and low-byte of ix; the same with iyh and iyl.
ixh
ixl
ix
iyh
iyl
ldi increments the memory pointer in indirect register addressing after the load, e.g. 'ldi a,(hl)' is 'ld a,(hl):inc hl'.
ldi
'ldi a,(hl)'
'ld a,(hl):inc hl'
ldd decrements the memory pointer in indirect register addressing after the load; e.g. 'lda a,(hl)' is 'ld a,(hl):dec hl'.
ldd
'lda a,(hl)'
'ld a,(hl):dec hl'
16-bit load between two registers is composed by two 8-bit load instructions or a sequence of push/pop, e.g. 'ld bc,de' is 'ld b,d:ld c,e', and 'ld hl,ix' is 'push ix:pop hl'.
'ld bc,de'
'ld b,d:ld c,e'
'ld hl,ix'
'push ix:pop hl'
16-bit load in indirect register addressing is composed by a sequence of 8-bit load instructions and register increment/decrement, e.g. 'ld bc,(hl)' is 'ld c,(hl):inc hl:ld b,(hl):dec hl'.
'ld bc,(hl)'
'ld c,(hl):inc hl:ld b,(hl):dec hl'
16-bit subtract is composed by clearing the carry flag and subtract with carry, e.g. 'sub hl,bc' is 'or a:sbc hl,bc'.
'sub hl,bc'
'or a:sbc hl,bc'
sll (and the synonym sli) is Shift Logical Left, works as sla but sets bit 0.
sll
sli
sla
'in f,(c)' reads the port pointed by c and sets the flags, but does not store the result.
'in f,(c)'
c
'out (c),0' outputs zero to the port pointed by c.
'out (c),0'
Two argument rotate instrution in index register indirect mode stores the result in the second argument, e.g. 'rlc (ix+d),c' rotates the value pointed by (ix+d) and stores the result in c.
'rlc (ix+d),c'
(ix+d)
Three argument bit set/clear instrution in index register indirect mode stores the result in the third argument, e.g. 'set 3,(ix+d),c' sets bit-3 of the the value pointed by (ix+d) and stores the result in c.
'set 3,(ix+d),c'
Rotate instructions (rl, rr, sla, sll, sli, sra, srl) with the 16-bit registers are implemented by rotating one register into carry and the other from carry.
rl
rr
sra
srl
Conditional relative jump with flags not available in jr are coded as absolute jumps, e.g. <'jr po,NN'> is <'jp po,NN'>.
jr
The RST instruction takes as its parameter either the address to jump to or the reset vector number - this is just the address / 8.
'stop' is a special instruction for CPU::Emulator::Z80 coded as 0xDD, 0xDD, 0x00.
'stop'
0xDD, 0xDD, 0x00
The official Z80 assembly instructions have a maximum of 4 bytes; the composed instructions have a maximum of 10 bytes.
<% assembly_table() %>
Based on sjasmplus http://sjasmplus.sourceforge.net/ undocumented opcodes. See also http://www.z80.info/zip/z80-documented.pdf for a description of the undocumented Z80 instructions.
Paulo Custodio, <pscust at cpan.org>
<pscust at cpan.org>
Please report any bugs or feature requests through the web interface at http://rt.cpan.org/NoAuth/Bugs.html?Dist=Asm-Z80-Table.
Copyright (c) 2010 Paulo Custodio.
This program is free software; you can redistribute it and/or modify it under the terms of either: the GNU General Public License as published by the Free Software Foundation; or the Artistic License.
See http://dev.perl.org/licenses/ for more information.
To install Asm::Z80::Table, copy and paste the appropriate command in to your terminal.
cpanm
cpanm Asm::Z80::Table
CPAN shell
perl -MCPAN -e shell install Asm::Z80::Table
For more information on module installation, please visit the detailed CPAN module installation guide.